<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>EECS on Haifei's Home</title><link>https://haifei-home.pages.dev/en/categories/eecs/</link><description>Recent content in EECS on Haifei's Home</description><generator>Hugo</generator><language>en</language><managingEditor>hfwang132@gmail.com (hfwang132)</managingEditor><webMaster>hfwang132@gmail.com (hfwang132)</webMaster><copyright>This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.</copyright><lastBuildDate>Sun, 02 Nov 2025 12:53:03 +0800</lastBuildDate><atom:link href="https://haifei-home.pages.dev/en/categories/eecs/index.xml" rel="self" type="application/rss+xml"/><item><title>High-Precision Time Measurement—Analysis of TDC / Time Tagger Principles and Architecture</title><link>https://haifei-home.pages.dev/en/post_20251102_%E9%AB%98%E7%B2%BE%E5%BA%A6%E6%97%B6%E9%97%B4%E6%B5%8B%E9%87%8F-tdc-time-tagger-%E5%8E%9F%E7%90%86%E5%92%8C%E7%BB%93%E6%9E%84%E5%88%86%E6%9E%90/</link><pubDate>Sun, 02 Nov 2025 12:53:03 +0800</pubDate><author>hfwang132@gmail.com (hfwang132)</author><guid>https://haifei-home.pages.dev/en/post_20251102_%E9%AB%98%E7%B2%BE%E5%BA%A6%E6%97%B6%E9%97%B4%E6%B5%8B%E9%87%8F-tdc-time-tagger-%E5%8E%9F%E7%90%86%E5%92%8C%E7%BB%93%E6%9E%84%E5%88%86%E6%9E%90/</guid><description>&lt;h2 id="1-what-is-a-tdc--time-tagger"&gt;1. What Is a TDC / Time Tagger?&lt;/h2&gt;
&lt;p&gt;A Time-to-Digital Converter (TDC) is essentially an extremely precise timer (at the picosecond level) that assigns a high-precision timestamp (Timestamp) to every input pulse signal.&lt;/p&gt;
&lt;p&gt;Therefore, a TDC is also called a Time Tagger, where “Tag” means assigning a timestamp.&lt;/p&gt;
&lt;p&gt;TDCs / Time Taggers are central to experiments such as Hong-Ou-Mandel interference and fluorescence lifetime measurements; it can be said that quantum optics experiments can hardly do without them.&lt;/p&gt;</description></item><item><title>Impedance Matching / Signal Integrity Crash Course (Lab Edition)</title><link>https://haifei-home.pages.dev/en/post_20251025_%E9%98%BB%E6%8A%97%E5%8C%B9%E9%85%8D-%E4%BF%A1%E5%8F%B7%E5%AE%8C%E6%95%B4%E6%80%A7%E9%80%9F%E6%88%90-%E5%AE%9E%E9%AA%8C%E5%AE%A4%E7%89%88/</link><pubDate>Sat, 25 Oct 2025 16:46:08 +0800</pubDate><author>hfwang132@gmail.com (hfwang132)</author><guid>https://haifei-home.pages.dev/en/post_20251025_%E9%98%BB%E6%8A%97%E5%8C%B9%E9%85%8D-%E4%BF%A1%E5%8F%B7%E5%AE%8C%E6%95%B4%E6%80%A7%E9%80%9F%E6%88%90-%E5%AE%9E%E9%AA%8C%E5%AE%A4%E7%89%88/</guid><description>&lt;h2 id="i-introduction"&gt;I. Introduction&lt;/h2&gt;
&lt;p&gt;Recently, I found that many colleagues are not very familiar with impedance matching. They only know that “the impedance of (commonly used SMA/BNC) transmission lines is 50 ohms,” but do not know what this really means. The following situations often occur:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;A 50-ohm signal source connected to a scope with a 1M-ohm input:&lt;/li&gt;
&lt;/ul&gt;
&lt;ul&gt;
&lt;li&gt;Huh, why did the signal become twice as large?&lt;/li&gt;
&lt;/ul&gt;
&lt;ul&gt;
&lt;li&gt;A high-frequency square wave connected to a scope with a 1M-ohm input:&lt;/li&gt;
&lt;/ul&gt;
&lt;ul&gt;
&lt;li&gt;Huh, why is the overshoot so severe? Is there something wrong with this signal source?&lt;/li&gt;
&lt;/ul&gt;
&lt;ul&gt;
&lt;li&gt;The output signal of an MCU / DAC / FPGA connected directly, without a driver, to a 50-ohm load / 50-ohm oscilloscope input:&lt;/li&gt;
&lt;/ul&gt;
&lt;ul&gt;
&lt;li&gt;Huh, why did a signal that was supposed to be 3V become only 30 mV?&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;All of the above result from unfamiliarity with impedance matching and transmission-line theory.&lt;/p&gt;</description></item><item><title>HW &amp; SW design of the AXI Quad SPI IP core</title><link>https://haifei-home.pages.dev/en/post_20230629_axi-spi-ip-%E6%A0%B8%E7%9A%84%E8%BD%AF%E7%A1%AC%E4%BB%B6%E8%AE%BE%E8%AE%A1/</link><pubDate>Sat, 01 Jul 2023 17:49:31 +0800</pubDate><author>hfwang132@gmail.com (hfwang132)</author><guid>https://haifei-home.pages.dev/en/post_20230629_axi-spi-ip-%E6%A0%B8%E7%9A%84%E8%BD%AF%E7%A1%AC%E4%BB%B6%E8%AE%BE%E8%AE%A1/</guid><description>&lt;h3 id="1-basics"&gt;1 Basics&lt;/h3&gt;
&lt;p&gt;SPI has three-wire mode and four-wire mode. The three-wire mode consists of three wires - &lt;code&gt;SS&lt;/code&gt; (Slave Select), &lt;code&gt;SCK&lt;/code&gt; (SPI Clock), and &lt;code&gt;MOSI&lt;/code&gt; (Master-In-Slave-Out). The four wire mode has an extra line called &lt;code&gt;MISO&lt;/code&gt; (Master-In-Slave-Out).&lt;/p&gt;
&lt;table&gt;
 &lt;thead&gt;
 &lt;tr&gt;
 &lt;th&gt;Signals&lt;/th&gt;
 &lt;th&gt;Full Name&lt;/th&gt;
 &lt;/tr&gt;
 &lt;/thead&gt;
 &lt;tbody&gt;
 &lt;tr&gt;
 &lt;td&gt;SS&lt;/td&gt;
 &lt;td&gt;Slave Select&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;SCK&lt;/td&gt;
 &lt;td&gt;SPI Clock&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;MOSI&lt;/td&gt;
 &lt;td&gt;Master-Out-Slave-In&lt;/td&gt;
 &lt;/tr&gt;
 &lt;tr&gt;
 &lt;td&gt;MISO&lt;/td&gt;
 &lt;td&gt;Master-In-Slave-Out&lt;/td&gt;
 &lt;/tr&gt;
 &lt;/tbody&gt;
&lt;/table&gt;
&lt;p&gt;SPI clock has four modes: CPOL=0/1 and CPHA=0/1. CPOL stands for clock polarity &amp;ndash; clock low or high when in idle. CPHA stands for clock phase &amp;ndash; data valid at 0 degree or 180 degrees.&lt;/p&gt;</description></item><item><title>Access the Internet from evaluation boards via PC</title><link>https://haifei-home.pages.dev/en/post_20230612_%E5%BC%80%E5%8F%91%E6%9D%BF%E9%80%9A%E8%BF%87-pc-%E8%BF%9E%E6%8E%A5%E4%BA%92%E8%81%94%E7%BD%91/</link><pubDate>Mon, 12 Jun 2023 23:22:45 +0800</pubDate><author>hfwang132@gmail.com (hfwang132)</author><guid>https://haifei-home.pages.dev/en/post_20230612_%E5%BC%80%E5%8F%91%E6%9D%BF%E9%80%9A%E8%BF%87-pc-%E8%BF%9E%E6%8E%A5%E4%BA%92%E8%81%94%E7%BD%91/</guid><description>&lt;h3 id="windows"&gt;Windows&lt;/h3&gt;
&lt;p&gt;Set a network adapter that can access the internet in the Control Panel and share it with Ethernet. The IP address of Ethernet will change to &lt;code&gt;192.168.137.1&lt;/code&gt; (this is the default behavior in Windows).&lt;/p&gt;
&lt;p&gt;Then, set the gateway as &lt;code&gt;192.168.137.1&lt;/code&gt; in the terminal of the development board:&lt;/p&gt;
&lt;p&gt;&lt;code&gt;sudo route add default gw 192.168.137.1&lt;/code&gt;&lt;/p&gt;
&lt;p&gt;Set the IP address as &lt;code&gt;192.168.137.x&lt;/code&gt;, where x is any value except 1 and 255 (gateway address and broadcast address):&lt;/p&gt;</description></item><item><title>Partitioning and formatting SD cards on Linux</title><link>https://haifei-home.pages.dev/en/post_20230612_%E5%9C%A8-linux-%E4%B8%AD%E7%BB%99-sd-%E5%8D%A1%E5%88%86%E5%8C%BA%E5%B9%B6%E5%88%9B%E5%BB%BA%E6%96%87%E4%BB%B6%E7%B3%BB%E7%BB%9F/</link><pubDate>Mon, 12 Jun 2023 22:43:36 +0800</pubDate><author>hfwang132@gmail.com (hfwang132)</author><guid>https://haifei-home.pages.dev/en/post_20230612_%E5%9C%A8-linux-%E4%B8%AD%E7%BB%99-sd-%E5%8D%A1%E5%88%86%E5%8C%BA%E5%B9%B6%E5%88%9B%E5%BB%BA%E6%96%87%E4%BB%B6%E7%B3%BB%E7%BB%9F/</guid><description>&lt;p&gt;To partition and format an SD card in Linux, follow these steps: First, connect the SD card to your PC. Then, use the fdisk command in the bash command line to partition the SD card. Finally, use the mkfs command to create a file system (format) on the SD card.&lt;/p&gt;
&lt;p&gt;The main commands are as follows:&lt;/p&gt;
&lt;p&gt;First, use &lt;code&gt;sudo fdisk -l&lt;/code&gt; to confirm which device in &lt;code&gt;/dev&lt;/code&gt; corresponds to the SD card.&lt;/p&gt;</description></item></channel></rss>